| - |
Introduction to
VLSI |
| - |
Fundamentals of Digital design
|
| - |
FPGA and CPLD from XILINX
and ALTERA |
| - |
Programmable Logic architecture
|
| - |
Design Methodology and Implementation
|
| - |
Design and programming using
VHDL |
| - |
Synthesis and Simulation using
XILINX web pack and Modelsim |
| - |
Design with CPLD and FPGA
kits |
| - |
System design and implementation
|
| - |
Programming and interfacing
various peripherals |
| - |
Mini project |
| - |
Case study |
| - |
Mini Project |
| Duration
: |
|
80 Hours (Daily
2 hours, weekly 5 days) or
80 Hours (Saturday and Sunday full day) |
|
VLSI
